What makes the Nios II processor the world's most versatile processor?
Nios II介绍
from: https://www.altera.com/products/processors/overview.html
Overview
Nios II Processor: The World's Most Versatile Embedded Processor
Application |
Nios II |
Vendor |
Description |
Altera |
|||
Power and cost sensitive |
Nios II economy core |
Altera |
With as low as 600 logic elements, the Nios II economy processor core is ideal for microcontroller applications. The Nios II economy processor core, software tools, and device drivers are offered free of charge. |
Real time |
Nios II standard and fast core |
Altera |
Absolutely deterministic, jitter free real-time performance with unique hardware real-time features · Vector Interrupt Controller · Tightly Coupled Memory · Custom instructions (ability to use FPGA hardware to accelerate a function) · Supported by industry-leading real-time operating systems (RTOS) · Nios II processor is the ideal real-time processor to use with DSP Builder-based hardware accelerators to provide deterministic, high performance real-time results |
Applications processing |
Nios II fast core |
Altera |
With a simple configuration option, the Nios II fast processor core can use a memory management unit (MMU) to run embedded Linux. Both open source and commercially supported versions of Linux for Nios II processors are available. |
Altera Embedded Alliance |
|||
Certify your design for DO-254 compliance by using the Nios II Safety Critical procesor core along with the DO-254 compliance design services offered by HCell. |
Get Started Now
- Nios II processor evaluation kits:
- Low cost, easy to use. For example, MAX10 NEEK Kit and Arrow's BeMicro SDK
- Full of design examples, tutorials, and software examples
- Many Nios II processor community contributed design examples and software on the Altera Wiki
- Altera FPGA development kits:
- All new kits include pre-packaged Nios II processor design examples entitled "Board Update Portal"
- Getting started design consist of processor, Ethernet MAC with HTML web server application
- Nios II processor Getting Started Resources:
Download a design example, read product documentation, or take an instructor-led training class to get started.- Download Nios II processor documentation
- Download the Nios II EDS (now included with the free Quartus® II Web Edition software)
- Purchase a Nios II processor development or evaluation kit
- Take a Nios II processor training course
- Get started with a Nios II processor design example
- Visit the Nios II processor forum in the Altera Forum and interact with other Nios II processor designers
- Visit the Embedded Processing sections in the Altera Wiki
To ship designs featuring the Nios II processor, you will need to purchase a license for the Nios II processor.
Table 1. Processor Performance (MIPS* at fMAX) by Device
Processor Category |
Cost- and Power-Sensitive Processors |
Real-Time Processors |
Applications Processor |
|||
Devices |
ARM |
V1 ColdFire |
Nios II |
Nios II |
Nios II |
ARM |
Cyclone III |
80 at |
84 at |
30 at |
90 at |
195 at |
- |
Cyclone III LS |
- |
65 at |
20 at |
70 at |
160 at |
- |
Cyclone IV GX |
- |
70 at |
30 at |
70 at |
190 at |
- |
Arria II GX |
- |
84 at |
45 at |
115 at |
270 at |
- |
Stratix III |
150 at |
104 at |
48 at |
140 at |
340 at |
- |
Stratix IV |
- |
135 at |
50 at |
155 at |
340 at |
- |
Stratix V |
- |
135 at |
50 at |
170 at |
320 at |
- |
Notes for Table 1 and Table 2:
1. Dhrystones 2.1 benchmark
2. Per processor
Table 2. Processor Selector by Operating System Support
Processor Category |
Low-Cost Processors |
Real Time |
Applications Processor |
||
Features |
Supplier |
ARM |
V1 ColdFire |
Nios II |
ARM |
eCos |
eCosCentric |
- |
- |
Yes |
- |
eCos (Zylin) |
Zylin |
- |
- |
Yes |
- |
embOS |
Segger |
- |
Yes |
Yes |
- |
Erika Enterprice |
Evidence |
- |
- |
Yes |
- |
Euros RTOS |
Euros |
- |
- |
Yes |
- |
Linux |
Wind River |
- |
- |
Yes |
- |
Linux |
Timesys |
- |
- |
Yes |
- |
Linux |
SLS |
- |
- |
Yes |
- |
Linux |
Open Source |
- |
- |
Yes |
Yes |
MicroC/OS-II |
Micrium |
- |
- |
Yes |
- |
oSCAN |
Vector |
- |
- |
Yes |
- |
ThreadX |
Express Logic |
- |
Yes |
Yes |
- |
uCLinux |
Open Source
|
- |
- |
Yes |
- |
VxWorks |
Wind River |
- |
- |
No |
Yes
|
Features
Nios II Processor Feature Set and Performance
Nios II processor comprises family of three configurable 32 bit Harvard architecture cores:
- Fast (/f core): Six stage pipeline optimized for highest performance, optional MMU, or memory protection unit (MPU)
- Economy (/e core): Optimized for smallest size, is offered at no cost
- Standard (/s core): Balanced in performance and size
Summary of Perfomance
- Download the latest Nios II processor performance benchmarks data sheet
Summary of Features Supported
- MMU
- Memory protection unit (MPU)
- External Vector Interrupt Controller with up to 32 interrupts per controller
- Advanced exception support
- Separate instruction and data caches (configurable from 512 bytes to 64 KB)
- Access to up to 2 GB of external address space
- Optional tightly-coupled memory for instructions and data
- Up to six-stage pipeline to achieve maximum MIPS* (*Dhrystones 2.1 benchmark) per MHz
- Single-cycle hardware multiply and barrel shifter
- Hardware divide option
- Dynamic branch prediction
- Up to 256 custom instructions and unlimited hardware accelerators
- Configurable JTAG debug module
- Optional JTAG debug module enhancements, including hardware breakpoints, data triggers, and real-time trace
Industries Most Advanced System Integration and Debug Tools
- Quartus II software includes Qsys, the industry most advanced system integration tool for processor system design. With Qsys, designers integrate processors, peripherals, memory controller, communication controllers, and custom intellectual proeprty (IP) cores in a graphical user interface and the tool automatically generates high performance system interconnect logic.
- Quartus II software system debug capabilities provide advanced debug capabilities at every level of the design:
- Transceiver and Memory Tool Kit for protocol and memory debugging
- SignalTapTM II logic analyzer for signal and logic level transactions
- Signal Probe for IO level transactions
- System Console for register level transactions
Free Embedded Peripheral IP Cores
- Rich portfolio of Qsys-ready embedded peripheral intellectual property (IP) cores that are provided at no cost
- DMA Controller
- Scatter Gather DMA Controller
- SDR SDRAM Controller
- CFI Flash Controller
- EPCS Serial Flash Controller
- JTAG UART Controller
- UART Controller
- SPI Controller
- PIO Controller
- Mutex Core
- Mailbox Core
- Timer Core
- Vector Interrupt Controller Core
- Performance Counter
- Phase-locked loop (PLL)
- Avalon® Interconnect Components
Free Embedded Software Tools, Software, and Middleware
Everything you need to develop robust software applications is provided for you in the Nios II EDS. You'll feel right at home with the Eclipse-based Nios II Software Build Tools for Eclipse and a full range of software and operating system support provided by Altera and its partners.
- The Nios II EDS includes:
- Nios II Software Build Tools for Eclipse, a fully integrated graphcial development environment
- GNU tools (GCC compiler, GDB debugger)
- Software examples and templates, device drivers and bare metal HAL
- Free Nichestack TCP/IP Network Stack, Nios II Edition, commercial grade network stack
- Evalution version of Micrium's popular MicroC/OS-II RTOS
See what's new in the latest release of Nios II EDS.
Ecosystem
Embedded Operating Systems for the Nios II Processor
Operating System |
Associated Processor |
Supplier |
Nios® II |
||
Nios II |
||
Nios II |
||
Nios II |
||
Nios II |
||
Nios II |
||
Nios II |
||
Nios II |
||
Nios II |
||
MicroC/OS-II (1) |
Nios II |
|
osCAN (2) |
Nios II |
|
Nios II |
||
Nios II |
||
Nios II |
Notes:
1. Evaluation included with the Nios II Embedded Design Suite, but licensed separately.
2. OSEK/VDX compliant. OSEK/VDX is an open standard of the automotive industry.
Middleware & Graphics Libraries
Company Name |
OS Supported |
Network Stack |
File System |
Graphics Library |
USB Stack |
Miscellaneous |
Built in |
Built in |
- |
- |
- |
||
NetX (1) |
FileX (1) |
PegX (1) |
USBX (1) |
- |
||
Any |
- |
- |
- |
- |
||
Nucleus File (1) |
Nucleus GRAFIX (1) |
Nucleus USB (1) |
- |
|||
Any |
- |
- |
- |
- |
||
Built in |
Built in |
- |
- |
- |
||
Built in |
Built in |
- |
- |
- |
||
Built in |
Built in |
- |
- |
|||
Community supported(www.alterawiki.com) |
Built in |
Built in |
- |
- |
- |
|
Any |
- |
- |
- |
- |
Notes:
1. Contact company for availability.
2. Included with the Nios II Embedded Design Suite, but licensed separately.
3. Included with the Nios II Embedded Design Suite.
Software Development Tools
Company |
Product |
Description |
Workbench |
Software development tools for embedded Linux on the Nios II processor. |
|
GNU toolchain support for embedded Linux on the Nios II processor. |
||
GNU toolchain support for the dual-core ARM Cortex-A9 MPCore processor-based SoC Virtual Target. |
||
Tasking VX-toolset |
Optimizing C compiler, assembler, linker, and locator. |
|
System Navigator |
The System Navigator probe for Nios II processors is designed to support the special features and integrated peripherals of the Nios II cores embedded in Altera FPGAs. |
|
Linux toolchain from the open-source community. |
||
µLinux toolchain from the open-source community. |